1. Field of the Invention
The present invention relates to a test apparatus and a control method. Particularly, the present invention relates to a test apparatus and a control method for causing a control processor to transmit a control instruction to a test unit to control the test unit for testing a device under test.
2. Related Art
A control processor provided in a test apparatus operates based on a control program installed and transmits an instruction to a test unit. Thereby it enables to control the test unit to appropriately activate and to change the setting of the test unit in operation.
However, for the test unit, the order of instructions to be processed is determined based on the specification thereof. If the order of executing the instructions does not meet the specification, the test unit and the device under test might be damaged.
Additionally, for the test unit, the timing to be executed based on the specification thereof. For example, the next instruction should be executed after a predetermined waiting period when the voltage is changed, otherwise the test unit might not normally operate due to an unstable voltage. Therefore, the programmer appropriately inserts instructions to wait for a predetermined period without executing any instruction into the program.
The instructions to wait for a predetermined period can be enabled by setting an stand-by time to a timer outside of a control processor and generating to interrupt the control processor from the timer. Additionally, the instructions to wait for a predetermined period can be enabled by executing an idle loop which does not basically need in the control program and executing a stand-by by a function of an operating system for controlling the control processor.
However, a time for which the processor waits may be different from the time expected by the programmer because the timing of each instruction is different from each other.
For example, when the control processor receives executes various interrupts and thereby executes the other process, or time-shares a plurality of tasks and executes the same, the timing of the instruction might be delayed. Then, if the timing of the instruction is accelerated because of the difference of the timing of the execution, the next process is executed without holding a sufficient stand-by time, so that the test unit might be damaged.
In order to avoid the above-described disadvantage, the programmer creates the control program so as to hold a stand-by time sufficiently longer than the actually required stand-by time. Therefore, the time required for setting is significantly longer than the actually required time, so that the effect of the whole of the test processing could have been reduced.
Here, refer Japanese Patent Application Publication No. 11-64450 as a related art regarding a semiconductor test apparatus.